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Comment by Marcuss2 | original | RISC-V is now officially supported by CPython
[−]Marcuss2 · 2026-08-30 Sun 12:07 UTC · link
For example x86_64 has v1, v2, v3 and v4 baselines, this tells you which instructions they support (e.g. v4 has AVX-512, v3 has AVX2, etc.).

RISC-V RVA22 and RVA23 aren't too different in this regard. Each one prescribes which extensions must be supported by the processor. I saw RV64GC mentioned, this is just a shortening of RV64IMAFDC, so I for baseline instructions, M for multiplication and division, A for atomic, F for floating point, D for double precision floating point and C for compressed instructions.

You can have a baseline E profile instead of I (less registers, some other features stripped), but I don't think we will ever see manufactured RV64E core, trough RV32EC cores exist.

[−]cbm-vic-20 · 2026-08-30 Sun 13:31 UTC · link
The E extension will probably only ever appear in softcores (FPGA) to reduce gate count.
[−]Marcuss2 · 2026-08-30 Sun 13:54 UTC · link
CH32V003 has RV32EC core, for RV64, yes, there is no point.